GSoC 2022 Project Idea 4.1: ISPC backends for GeNN (350 h)

For the part of porting Cuda to ISPC , does this mean porting it manually?
or with some generator.

Yeah, the idea of this preliminary task is to port it manually, both as a way to learn ISPC and to better understand what would need to change in an ISPC backend for GeNN.

I’m not 100% sure but I think you’re correct that, at least in this example, all the __shared__ variables should be implemented as uniform. However, “gangs” in ISPC always run synchronously so I don’t think memory barriers are required in this instance. From the manual (Intel® ISPC User's Guide):

Note that this barrier is not needed for coordinating reads and writes among the program instances in a gang; it’s only needed for coordinating between multiple hardware threads running on different cores.

Hi Jamie,
these days I read the ISPC user guide. for the __shared__ variables in CUDA, I think
the only alternative in ISPC is uniform.
I am not an expert in CUDA but here’s what i think:
In CUDA the GPU is divided into blocks, each with 1024 threads,
(several warps), so __shared__ indicates that the variable is shared across the block.
the programming model of ISPC there’s a gang consisting of multiple program instances. they are executed directly on vector lanes, so there’s no difference between __shared__ and __global__ meaning in ISPC.
However, I read the part explaining SPMD parallelism to parallelize across the SIMD vector lanes on a single core.
I am not sure how it is in the task model, I am reading it now.

Please correct me if I am wrong

Thanks