GeNN is a C++ library that generates code for efficiently simulating Spiking Neural Networks using GPUs. Currently, GeNN generates CUDA, OpenCL code meaning that it can target a wide range of GPUs. However, for simulating smaller models, focused targeting of SIMD CPUs may be advantageous. For this project you will develop a new GeNN code-generation backend for ISPC (http://ispc.github.io/), which targets the SIMD units in a wide range of modern CPUs using a CUDA-like programming model.
Skill level: Advanced
Required skills: C++, Single Instruction Multiple Thread (SIMT) programming
For anyone interested in this project, good first steps would be getting familiar with ISPC via the materials linked to from http://ispc.github.io/ and with using GeNN via the documentation and tutorials here.
If you feel like digging a little deeper in the following areas might be good preparation for writing your application:
Have a look at the CUDA code generated by GeNN (it will be generated in a directory ending in _CODE alongside your model) and think about the similarities/differences between this and ISPCC
Implementing the ISPC backend will involve implementing a new class, derived from CodeGenerator::BackendSIMT (genn/backendSIMT.h). Start having a look at this interface and how the CUDA backend (genn/backend.h ) implements it.
Alternatively, if you fancy having a go at a pre-project task, try manually porting this GeNN-like CUDA code to ISPCC (the CUDA version can be compiled with nvcc test.cc -o test) - the results can be plotted with this script .
Hi there, I just wanted to add, please don’t be shy to reach out with questions. Either here but also on our email addresses listed above which we monitor more frequently.
Hello,
I know it’s a little late, but I am writing my proposal for this.
Implementing the ISPC backend will involve implementing a new class, derived from CodeGenerator::BackendSIMT
Wouldn’t it be better to create a new class CodeGenerator::BackendSIMD?
I think ISPC, and CUDA are a little different, most of the implementation will be the same but ISPC execution is similar to the warp execution in CUDA, not the whole model. May be we can support some new backends in the future that support SIMD.
I am not sure yet.
ISPC exposes SIMD CPU functionality via a SIMT programming interface like CUDA and OpenCL so my hope would be that much of the functionality in the current BackendSIMT will be usable as is.